Altera cyclone V Technical Reference page 1595

17-380
PPS_Control
Bit
Altera Corporation
Name
clock of following frequencies:
-0001: The binary rollover is 2 Hz,
and the digital rollover is 1 Hz.
-0010: The binary rollover is 4 Hz,
and the digital rollover is 2 Hz.
-0011: The binary rollover is 8 Hz,
and the digital rollover is 4 Hz.
-0100: The binary rollover is 16
Hz, and the digital rollover is 8
Hz.
-...
-1111: The binary rollover is
32.768 KHz, and the digital rollover
is 16.384 KHz.
Note:
In the binary rollover mode, the PPS
output (ptp_pps_o) has a duty cycle
of 50 percent with these frequencies.
In the digital rollover mode, the
PPS output frequency is an average
number. The actual clock is of
different frequency that gets
synchronized every second. For
example:
* When PPSCTRL = 0001, the PPS (1
Hz) has a low period of 537 ms and a
high period of 463 ms
* When PPSCTRL = 0010, the PPS (2
Hz) is a sequence of:
- One clock of 50 percent duty
cycle and 537 ms period
- Second clock of 463 ms period
(268 ms low and 195 ms high)
* When PPSCTRL = 0011, the PPS (4
Hz) is a sequence of:
- Three clocks of 50 percent duty
cycle and 268 ms period
- Fourth clock of 195 ms period
(134 ms low and 61 ms high)
This behavior is because of the non-
linear toggling of bits in the
digital rollover mode in Register
451 (System Time - Nanoseconds
Register).
Flexible PPS0 Output (ptp_pps_o[0])
Control
Description
2016.10.28
Access Reset
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