Altera cyclone V Technical Reference page 1598

Hard processor system
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cv_5v4
2016.10.28
Module Instance
emac0
emac1
Offset:
0x734
Access:
RO
31
30
15
14
Auxiliary_Timestamp_Seconds Fields
Bit
31:0
auxtshi
PPS0_Interval
The PPS0 Interval register contains the number of units of sub-second increment value between the rising
edges of PPS0 signal output (ptp_pps_o[0]).
Module Instance
emac0
emac1
Offset:
0x760
Access:
RW
Ethernet Media Access Controller
Send Feedback
0xFF700000
0xFF702000
29
28
27
26
13
12
11
10
Name
Contains the higher 32 bits (Seconds field)​ of the
auxiliary timestamp.
0xFF700000
0xFF702000
Base Address
Bit Fields
25
24
23
22
auxtshi
RO 0x0
9
8
7
6
auxtshi
RO 0x0
Description
Base Address
PPS0_Interval
Register Address
0xFF700734
0xFF702734
21
20
19
18
5
4
3
2
Access
Register Address
0xFF700760
0xFF702760
17-383
17
16
1
0
Reset
RO
0x0
Altera Corporation

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