cv_54011
2013.12.30
Resets
The SD/MMC controller has one reset signal. The reset manager drives this signal to the SD/MMC controller
on a cold or warm reset.
Related Information
Reset Manager
Interface Signals
Table 11-15: SD/MMC Controller Interface I/O Pins
Signal
sdmmc_cclk_out
sdmmc_cmd
sdmmc_pwren
sdmmc_data
SD/MMC Controller Programming Model
Initialization
After the power and clock to the controller are stable, the controller active-low reset is asserted. The reset
sequence initializes the registers, FIFO buffer pointers, DMA interface controls, and state machines in the
controller.
SD/MMC Controller
Send Feedback
on page 3-1
Width
1
1
1
8
†
Direction
Out
In/Out
Out
In/Out
11-29
Resets
Description
Clock from controller to
the card
Card command
External device power
enable
Card data
Altera Corporation