Command Mapping - Altera Cyclone V Device Handbook

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10-6
Register Map for Indexed Addressing
Register Map for Indexed Addressing
Table 10-2: Register Map for Indexed Addressing
Register Name
Control
Data
Related Information
MAP00 Address Mapping
MAP01 Address Mapping
MAP10 Address Mapping
MAP10 Operations
Indexed Addressing Host Usage
The host uses indexed addressing as follows:
1. Program the 32-bit index-address field into the Control register at offset 0x0 of the data/command
slave port. This action provides the flash address parameters to the NAND flash controller.
2. Perform 32-bit read or write in the Data register at offset 0x10 of the data/command slave port.
3. Perform additional 32-bit reads and writes if they are in the same page and block in flash memory.
It is unnecessary to write to the control register for every data transfer if a group of data transfers targets the
same page and block address. For example, you can write the control register at the beginning of a page with
the block and page address, and then read or write the entire page by directing consecutive transactions to
the Data register.

Command Mapping

The NAND flash controller supports several flash controller-specific MAP commands, providing an
abstraction level for programming a NAND flash device. By using the MAP commands, you can avoid
directly programming device-specific commands. Using this abstraction layer provides enhanced performance.
Commands take multiple cycles to send off-chip. The MAP commands let you initiate commands and let
the flash controller sequence them off-chip to the NAND device.
Altera Corporation
Offset Address
0x0
Software writes the 32-bit control information consisting of
MAP command type, block, and page address. The upper four
bits must be set to 0. For specific usage of the Control
register, refer to MAP00 Address Mapping, MAP01 Address
Mapping, MAP10 Address Mapping, and MAP10 Operations.
0x10
The Data register is a page-size window into the NAND
flash. By reading from or writing to locations starting at this
offset, the software reads directly from or writes directly to
the page and block of NAND flash memory specified by the
Control register.
on page 10-7
on page 10-8
on page 10-10
on page 10-10
Usage
NAND Flash Controller
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2013.12.30

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