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Peripherals
Figure 1-27: EMAC System Diagram
Sinus Cardinalis (SINC) Filter
The sinus cardinalis (SINC) filter module processes four independent sigma-delta bit streams by applying a pair of
SINC filters to each stream. See System Accelerators (FFT/FIR/IIR/HAE/SINC)The following sections provide in-
formation about the high-performance acceleration engines on the processor..
Figure 1-28: SINC System Diagram
DAI/SRU Peripherals
The
Digital Audio Interface (DAI)
nal Routing Units (SRUn). The SRU connects inputs and outputs of the DAI peripherals with each other and to the
external pins. This configuration allows peripherals to be interconnected to accomodate a wide variety of systems
without making external pin connections.
The
DAI Routing Capabilities
example for the eight SPORTs is shown in the following figure.
1–14
ETHx_TXDy
ETHx_MDC
ETHx_MDIO
ETHx_RXDy
PA_15:00 Pins
ETHx_RXCLK_REFCLK
PB_06:00 Pins
ETHx_RXCTL_CRS
PF_15:13 Pins
ETHx_TXCTL_TXEN
PG_05:00 Pins
ETHx_TXCLK
ETHx_PTPPPSy
ETHx_PTPCLKIN0
ETHx_PTPAUXINy
Clocked by CDU0_CLKO7
SINC0_CLK0
PB_01 Pin
SINC0_D0
PA_14 Pin
SINC0_D1
PA_15 Pin
SINC0_D2
PB_00 Pin
SINC0_D3
PB_04 Pin
Clocked by SCLK0_0
(DAIn) are comprised of groups of identical peripherals and their respective Sig-
section provides an overview of the different routing capabilities for the DAI unit. An
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
EMAC
EMAC Status Interrupts (EMACx_STAT) to SEC/GIC
EMAC Status Triggers (EMACx_STAT) to TRU Slaves
System MMR Write-Protection (WP56:55) from SPU
Enable Secure Peripheral (SECUREP56:55) from SPU
SINC
SINC Status Interrupt (SINC0_STAT) to SEC/GIC
SINC Pair Overload Triggers (SINC0_Px_OVLD) to TRU Slaves
SINC Data Move Triggers (SINC0_DATAx) to TRU Slaves
System MMR Write-Protection (WP60) from SPU
Enable Secure Peripheral (SECUREP60) from SPU
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