Analog Devices ADSP-SC58 Series Hardware Reference Manual page 769

Sharc+ processor
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Received Word Count Register
The
register holds a count of the number of words remaining to be received by the SPI. To start the
SPI_RWC
decrement of the word count in SPI_RWC, enable the receive word counter (SPI_RXCTL.RWCEN =1). The SPI
uses the word count to control the duration of transfers and to signal the completion of a burst of transfers with the
receive finish interrupt (SPI_ILAT.RF). In DMA mode, the SPI uses the
number of frames received during a DMA transfer is equal to the number of words programmed in the DMA chan-
nel controller. The values programmed into the
figuration. The
SPI_RWC
should only be changed when the counter is disabled.
Figure 16-31: SPI_RWC Register Diagram
Table 16-29: SPI_RWC Register Fields
Bit No.
(Access)
15:0
VALUE
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
SPI_RWC
register maintains the number of frames to be received in a transfer. The
15
14
13
0
0
0
VALUE (R/W)
Received Word Count
31
30
29
0
0
0
Bit Name
Received Word Count.
The SPI_RWC.VALUE bits hold the receive transfer word count.
registers should match the word count in the DMA con-
12
11
10
9
8
7
6
5
0
0
0
0
0
0
0
0
28
27
26
25
24
23
22
21
0
0
0
0
0
0
0
0
Description/Enumeration
ADSP-SC58x SPI Register Descriptions
SPI_RWC
register to ensure that the
4
3
2
1
0
0
0
0
0
0
20
19
18
17
16
0
0
0
0
0
SPI_RWC
16–63

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