Analog Devices ADSP-SC58 Series Hardware Reference Manual page 54

Sharc+ processor
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Enumeration........................................................................................................................................... 29–50
Enumeration Driver Example.............................................................................................................. 29–51
DMA Transfers....................................................................................................................................... 29–52
DMA Write Transfer Example............................................................................................................. 29–52
DMA Read Transfer Example.............................................................................................................. 29–53
Device Reset ........................................................................................................................................... 29–53
Cold Reset........................................................................................................................................... 29–54
Hot Reset ............................................................................................................................................ 29–54
ADSP-SC58x Product Specific Information .............................................................................................. 29–55
ADSP-SC58x PCIE Register Descriptions ................................................................................................ 29–56
Acknowledge Frequency and L0-L1 ASPM Control Register ................................................................. 29–64
Acknowledge Latency Timer and Replay Timer Register ....................................................................... 29–67
Advanced Error Capabilities and Control Register ................................................................................. 29–68
Advanced Error Reporting Extended Capability Header Register .......................................................... 29–69
Correctable Error Message Requester ID Register ................................................................................. 29–70
Application Control Register ................................................................................................................. 29–71
Diagnostic Control Register .................................................................................................................. 29–75
Diagnostic Status Register ..................................................................................................................... 29–76
Fatal Error Message Requester ID Register ............................................................................................ 29–77
Application Interrupts Status Register ................................................................................................... 29–78
Non Fatal Error Message Requester ID Register .................................................................................... 29–82
Power Management Acknowledge Message Requester ID Register ........................................................ 29–83
Power Management Event Message Requester ID Register .................................................................... 29–84
Power Management Turn Off Message Requester ID Register ............................................................... 29–85
Application Status Register .................................................................................................................... 29–86
Unlock Message Requester ID Register ................................................................................................. 29–88
Vendor Message Requester ID Register .................................................................................................. 29–89
Vendor Message Header Bytes 8 to 11 Register ..................................................................................... 29–90
Vendor Message Header Bytes 12 to 15 Register ................................................................................... 29–91
Auxiliary Clock Frequency Control Register .......................................................................................... 29–92
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ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference

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