Analog Devices ADSP-SC58 Series Hardware Reference Manual page 773

Table 16-31: SPI_RXCTL Register Fields (Continued)
Bit No.
(Access)
2 RTI
(R/W)
0 REN
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Receive Transfer Initiate.
The SPI_RXCTL.RTI bit enables initiation of receive transfers if the receive FIFO
(SPI_RFIFO) is not full. The bit also enables this initiation if
when SPI_RXCTL.RWCEN is enabled. Enabling SPI_RXCTL.RTI prevents re-
ceive overrun errors from occurring. The SPI_RXCTL.RTI bit is valid only when
the SPI is a master.
Receive Enable.
The SPI_RXCTL.REN bit enables SPI receive channel operation.
ADSP-SC58x SPI Register Descriptions
Description/Enumeration
0 Disable
1 Enable
0 Disable
1 Enable
SPI_RWC is not zero
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