Clkout Select Register - Analog Devices ADSP-SC58 Series Hardware Reference Manual

CLKOUT Select Register

The
CGU_CLKOUTSEL
ter selects the divisor for the USBCLK output.
CLKOUTSEL (R/W)
CLKOUT Select
LOCK (R/W)
Lock
Figure 3-5: CGU_CLKOUTSEL Register Diagram
Table 3-11: CGU_CLKOUTSEL Register Fields
Bit No.
(Access)
31 LOCK
(R/W)
21:16 USBCLKSEL
(R/W)
4:0 CLKOUTSEL
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
selects the signal that the CGU drives through the CLKOUT multiplexer. Also, this regis-
15 14 13 12 11
0 0 0 0 0
31 30 29 28 27
0 0 0 0 0
Bit Name
Lock.
If the global lock bit is set (SPU_CTL.GLCK bit =1) and the
CGU_CLKOUTSEL.LOCK bit is set, the
(locked).
USBCLK Select.
The CGU_CLKOUTSEL.USBCLKSEL selects the divisor in the USBCLK equation:
USBCLK frequency = (USB PLL frequency) / (CGU_CLKOUTSEL.USBCLKSEL
+1 )
Where the value of CGU_CLKOUTSEL.USBCLKSEL is between 0 and 63.
CLKOUT Select.
The CGU_CLKOUTSEL.CLKOUTSEL selects the signal that the CGU drives
through the CLKOUT pin multiplexer.
10 9 8 7 6 5 4 3
0 0 0 0 0 0 0 0
26 25 24 23 22 21 20 19 18
0 0 0 0 0 0 0 0
Description/Enumeration
0 Unlock
1 Lock
0 USBCLKSEL = 0
63 USBCLKSEL = 63
0 CLKIN0
1 CLKIN1
2 CGU_0.SYSCLK
3 CLKO0
ADSP-SC58x CGU Register Descriptions
2 1 0
0 0 0
17 16
0 0 0
USBCLKSEL (R/W)
USBCLK Select
CGU_CLKOUTSEL register is read only
3–17