Analog Devices ADSP-SC58 Series Hardware Reference Manual page 12

Error Type 0 Address Register ................................................................................................................. 9–16
Error Type 1 Address Register ................................................................................................................. 9–17
ECC Error Address 0 Register ................................................................................................................. 9–18
ECC Error Address 1 Register ................................................................................................................. 9–19
ECC Error Address 2 Register ................................................................................................................. 9–20
ECC Error Address 3 Register ................................................................................................................. 9–21
ECC Error Address 4 Register ................................................................................................................. 9–22
ECC Error Address 5 Register ................................................................................................................. 9–23
ECC Error Address 6 Register ................................................................................................................. 9–24
ECC Error Address 7 Register ................................................................................................................. 9–25
Error Type 0 Register ............................................................................................................................... 9–26
Error Type 1 Register ............................................................................................................................... 9–28
Refresh Address Register .......................................................................................................................... 9–29
Read Priority Count Register ................................................................................................................... 9–30
Status Register ......................................................................................................................................... 9–31
Write Priority Count Register .................................................................................................................. 9–34
Dynamic Memory Controller (DMC)
DMC Features ............................................................................................................................................. 10–1
Feature Exclusions .................................................................................................................................... 10–3
DMC Functional Description ..................................................................................................................... 10–3
ADSP-SC58x DMC Register List............................................................................................................. 10–3
ADSP-SC58x DMC Register List............................................................................................................. 10–4
Protocol Controller................................................................................................................................... 10–5
Efficiency Controller ................................................................................................................................ 10–5
Page-Based Scheduling .......................................................................................................................... 10–5
Same Master Transaction Scheduling .................................................................................................... 10–5
DMC Read Data Buffer ....................................................................................................................... 10–6
Closed Page Per Bank............................................................................................................................ 10–6
SCB ID-Based Priority .......................................................................................................................... 10–6
Delaying up to Eight Auto-Refresh Commands..................................................................................... 10–7
xii ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference