Analog Devices ADSP-SC58 Series Hardware Reference Manual page 469

Table 10-33: DMC_STAT Register Fields (Continued)
Bit No.
(Access)
2 INITDONE
(R/NW)
0 IDLE
(R/NW)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Initialization Done.
The DMC_STAT.INITDONE bit indicates that the initialization sequence is com-
plete.
Idle State.
The DMC_STAT.IDLE bit indicates whether the DMC is idle or busy.
ADSP-SC58x DMC Register Descriptions
Description/Enumeration
0 No Status
1 Initialize Done
0 Busy
1 Idle
10–63