Analog Devices ADSP-SC58 Series Hardware Reference Manual page 766

Sharc+ processor
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ADSP-SC58x SPI Register Descriptions
Table 16-26: SPI_MMRDH Register Fields (Continued)
Bit No.
(Access)
11
ADRPINS
(R/W)
10:8
ADRSIZE
(R/W)
7:0
OPCODE
(R/W)
16–60
Bit Name
Pins Used for Address.
The SPI_MMRDH.ADRPINS bit specifies the number of pins to be used for address
transmission. This bit must be set consistent with expectations established by read op-
code. Hardware does not interpret the SPI_MMRDH.OPCODE, but rather relies on
this bit to specify behavior.
Bytes of Read Address.
The SPI_MMRDH.ADRSIZE bit field defines the number of bytes used to specify the
read address. The read address is sent immediately following the transmission of op-
code. Unlike opcode bits, address bits may be sent using either one or multiple pins.
The number of pins is selected using the SPI_MMRDH.ADRPINS bit. The address
sent to a connected SPI memory device is an echo of the read address received by the
SPI peripheral slave port. The least significant bytes of address are sent when the entire
address is not sent.
Read Opcode.
The SPI_MMRDH.OPCODE bit field specifies the initial bits transmitted in response
to a read request of SPI memory. Although any opcode may be sent, values 0x03,
0x0B, 0x3B, 0x6B, 0xBB, and 0xEB are likely to be the most commonly used.
SPI_MMRDH.OPCODE is sent by the SPI without interpretation; the states of these
bits have no effect beyond specifying what is initially shifted across the SPI interface.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description/Enumeration
0 Use only one pin: MOSI (overrides SPI_CTL.MIOM
bits)
1 Use pins specified by SPI_CTL.MIOM bits
0 1 Byte
1 1 Byte
2 2 Bytes
3 3 Bytes
4 4 Bytes

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