Table of Contents
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System Security
Security Features .......................................................................................................................................... 42–1
Security Functional Description................................................................................................................... 42–2
Security Mode Configuration ...................................................................................................................... 42–4
Status and Error Signals ............................................................................................................................... 42–4
System Protection Unit (SPU)
SPU Features ............................................................................................................................................... 43–1
SPU Functional Description ........................................................................................................................ 43–1
ADSP-SC58x SPU Register List............................................................................................................... 43–1
ADSP-SC58x SPU Interrupt List ............................................................................................................ 43–2
Peripheral Register Write Protection......................................................................................................... 43–2
SPU Block Diagram..................................................................................................................................... 43–5
SPU Architectural Concepts ........................................................................................................................ 43–5
SPU Event Control ...................................................................................................................................... 43–5
SPU Programming Model ........................................................................................................................... 43–6
SPU Mode Configuration............................................................................................................................ 43–7
Locking Write-Protect Registers ............................................................................................................... 43–7
Protecting a Peripheral ............................................................................................................................. 43–7
Configuring Security Privileges of a Peripheral ............................................................................................ 43–8
ADSP-SC58x SPU Register Descriptions ................................................................................................... 43–8
Control Register ...................................................................................................................................... 43–9
Secure Check Register ............................................................................................................................ 43–10
Secure Control Register ......................................................................................................................... 43–11
Secure Core Registers ............................................................................................................................ 43–13
Secure Peripheral Register ...................................................................................................................... 43–14
Status Register ....................................................................................................................................... 43–15
Write Protect Register n ......................................................................................................................... 43–16
ADSP-SC5xx Write-Protect, Secure Peripheral and Secure Core Registers................................................. 43–16
ADSP-SC5xx Specific Information ............................................................................................................ 43–23
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
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