Analog Devices ADSP-SC58 Series Hardware Reference Manual page 615

Table 14-16: PORT_FER_CLR Register Fields (Continued)
Bit No.
(Access)
13 PX13
(R/W1C)
12 PX12
(R/W1C)
11 PX11
(R/W1C)
10 PX10
(R/W1C)
9 PX9
(R/W1C)
8 PX8
(R/W1C)
7 PX7
(R/W1C)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Port x Bit 13 Mode Clear.
The PORT_FER_CLR.PX13 bit enables GPIO mode.
Port x Bit 12 Mode Clear.
The PORT_FER_CLR.PX12 bit enables GPIO mode.
Port x Bit 11 Mode Clear.
The PORT_FER_CLR.PX11 bit enables GPIO mode.
Port x Bit 10 Mode Clear.
The PORT_FER_CLR.PX10 bit enables GPIO mode.
Port x Bit 9 Mode Clear.
The PORT_FER_CLR.PX9 bit enables GPIO mode.
Port x Bit 8 Mode Clear.
The PORT_FER_CLR.PX8 bit enables GPIO mode.
Port x Bit 7 Mode Clear.
The PORT_FER_CLR.PX7 bit enables GPIO mode.
ADSP-SC58x PORT Register Descriptions
Description/Enumeration
0 No Effect
1 Set Bit for GPIO Mode
0 No Effect
1 Set Bit for GPIO Mode
0 No Effect
1 Set Bit for GPIO Mode
0 No Effect
1 Set Bit for GPIO Mode
0 No Effect
1 Set Bit for GPIO Mode
0 No Effect
1 Set Bit for GPIO Mode
0 No Effect
1 Set Bit for GPIO Mode
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