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ITU-R 656 Modes
Figure 18-8: Typical Video Frame Partitioning for NTSC/PAL Systems in Interlaced and Progressive ITU-R BT.656 Systems
Figure 18-9: ITU-R 656 8-Bit Parallel Data Stream from NTSC (PAL) Systems
NOTE:
Refer to the Control Sequences for 8-Bit and 10-Bit ITU-R 656 Video table. There is a defined preamble
of three data elements (for example, in the case of 8-bit video: 0xFF, 0x00, 0x00), followed by the XY
status word. The status word contains four protection bits for error detection and correction excluding the
F (field), V (vertical blanking), and H (horizontal blanking) bits. F and V are only allowed to change as
part of EAV sequences (that is, transition from H = 0 to H = 1).
The bit definitions are as follows:
• F = 0 for field 1
• F = 1 for field 2
18–14
INTERLACED VIDEO
LINE #
1
LINE 4
VERTICAL
BLANKING
20
FIELD 1
NTSC
ACTIVE VIDEO
264
LINE 266
VERTICAL
BLANKING
283
FIELD 2
ACTIVE VIDEO
525
LINE 3
EAV
SAV
LINE 1
1
VERTICAL
BLANKING
23
FIELD 1
ACTIVE VIDEO
311
PA L
LINE 313
VERTICAL
BLANKING
336
FIELD 2
ACTIVE VIDEO
624
VERTICAL
BLANKING
625
LINE 625
EAV
SAV
PROGRESSIVE VIDEO
LINE #
1
VERTICAL
BLANKING
46
NTSC
ACTIVE VIDEO
525
EAV
SAV
1
VERTICAL
BLANKING
45
P AL
ACTIVE VIDEO
621
VERTICAL
BLANKING
625
EAV
SAV
END OF ACTIVE VIDEO
EAV
HORIZONTAL
CODE
BLANKING
(H = 1)
F
0
0
X
8
1
8
1
F
0
0
Y
0
0
0
0
4
268 (280 FOR PA L)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
LINE
F
V
FIELD 1
NUMBER
(EAV)
1-3
1
1
266-282
4-19
0
1
264-265
FIELD 2
20-263
0
0
283-525
1
0
FIELD 1
LINE
F
V
NUMBER
(EAV)
1-22
0
1
311-312
23-310
0
0
FIELD 2
313-335,
1
1
624-625
336-623
1
0
LINE
F
V
NUMBER
(EAV)
0
1
1-45
46-525
0
0
LINE
F
V
NUMBER
(EAV)
1-44,
0
1
621-625
45-620
0
0
START OF ACTIVE VIDEO
START OF
NEXT LINE
SAV
CODE
(H = 0)
8
1
F
0
0
X
C
Y C
Y
C
Y F
0
0
F
0
0
Y
B
R
R
F
4
1440
1716 (1728 FOR PA L)
H
H
(SAV)
1
0
1
0
1
0
1
0
H
H
(SAV)
1
0
1
0
1
0
1
0
H
H
(SAV)
1
0
1
0
H
H
(SAV)
1
0
1
0
DIGITAL
VIDEO
STREAM
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