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ADSP-SC58x DMC Register Descriptions
Configuration Register
The
register selects SDRAM device specific parameters and selects the SDRAM interface width.
DMC_CFG
EXTBANK (R/W)
External Banks
SDRSIZE (R/W)
SDRAM Size
Figure 10-2: DMC_CFG Register Diagram
Table 10-11: DMC_CFG Register Fields
Bit No.
(Access)
15:12
EXTBANK
(R/W)
11:8
SDRSIZE
(R/W)
10–24
15
14
13
12
11
0
0
0
0
0
31
30
29
28
27
0
0
0
0
0
Bit Name
External Banks.
The DMC_CFG.EXTBANK bits select the number of external banks connected to the
DMC. Note that all values other than those shown are reserved.
SDRAM Size.
The DMC_CFG.SDRSIZE bits select the size of individual SDRAM connected to the
DMC. Note that all values other than those shown are reserved.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
10
9
8
7
6
5
4
3
0
0
0
0
0
0
0
0
26
25
24
23
22
21
20
19
0
0
0
0
0
0
0
0
Description/Enumeration
0 1 External Bank
1-15 Reserved
0 64M Bit SDRAM (LPDDR Only)
1 128M Bit SDRAM (LPDDR Only)
2 256M Bit SDRAM
3 512M Bit SDRAM
4 1G Bit SDRAM
5 2G Bit SDRAM
6 4G Bit SDRAM
7 8G Bit SDRAM
2
1
0
0
0
0
IFWID (R/W)
Interface Width
SDRWID (R/W)
SDRAM Width
18
17
16
0
0
0
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