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4 Clock Distribution Unit (CDU)
The Clock Distribution Unit (CDU) consists of an array of multiplexors that select clocks originated from up to
four different clock sources. These sources are different clocks that are generated from the CGUs. The multiplexors
are configured by software. All clocks multiplexors have up to four different sources. Unused input clocks are groun-
ded internally and never selected. The output clock signal for each multiplexor is assigned to one or more destina-
tions within the processor as shown in
CDU Features
The CDU modules supports the following features:
• Generation of up to 10 output clocks
• Output clock buffers that can be disabled by software
• Each multiplexor has four input clocks
• Multiplexors that are configured by writing to configuration registers (CDU_CFG[n])
• Clocks originated in CGU0 that are selected by default
• A CDU status register (CDU_STAT) that indicates a configuration change is in-progress
• The processor supports 2 independent CGUs: CGU0 is used mandatory, CGU1 is used optional
CDU Functional Description
The CDU functions as a set of software-configurable multiplexors that select clocks from different sources.
CDU Block Diagram
The CDU Block Diagram figure shows the functional blocks within the CDU. As shown in the figure, the CDU
takes different clocks generated by the CGU blocks and provides flexibility to route any clock from possible options
as shown in
CDU Clock Configuration Options
connected to specific targets such as the core, DDR, or CAN module. These targets are clocked though the CDU
output clocks rather than being directly clocked by CGU clocks.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
CDU Clock Configuration
to the output CDU clocks. The output clocks from the CDU are
Options.
Clock Distribution Unit (CDU)
4–1
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