Analog Devices ADSP-SC58 Series Hardware Reference Manual page 209

Sharc+ processor
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Table 5-3: DPM_PER_DIS1 Register Mapping
Peripheral Name
TWI0
TWI1
TWI2
USB0
USB1
ADSP-SC58x DPM Register Descriptions
Dynamic Power Management (DPM) contains the following registers.
Table 5-4: ADSP-SC58x DPM Register List
Name
DPM_CTL
DPM_PER_DIS0
DPM_PER_DIS1
DPM_REVID
DPM_STAT
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Gated Module Clocks
SCLK0
SCLK0
SCLK0
SCLK0
SCLK0
Description
Control Register
Peripherals Disable Register 0
Peripherals Disable Register 1
Revision ID
Status Register
ADSP-SC58x DPM Register Descriptions
DPM_PER_DIS1 bit
0
1
2
3
4
5–5

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