Analog Devices ADSP-SC58 Series Hardware Reference Manual page 913

ADSP-SC58x EPPI Register Descriptions
Interrupt Mask Register
The register permits the masking (if associated bit is set) of EPPI error interrupts for YFIFO under-
EPPI_IMSK
flow or overflow, CFIFO underflow or overflow, line track overflow error, line track underflow error, frame track
overflow error, frame track underflow error, and ERR_NCOR (ITU preamble error not corrected. These conditions
are flagged in the EPPI_STAT
15
0
PXPERR (R/W)
PxP Ready Error Interrupt Mask
ERRNCOR (R/W)
ITU Preamble Error Not Corrected Interrupt
Mask
FTERRUNDR (R/W)
Frame Track Underflow Error Interrupt
Mask
FTERROVR (R/W)
Frame Track Overflow Error Interrupt
Mask
31
0
Figure 18-27: EPPI_IMSK Register Diagram
Table 18-61: EPPI_IMSK Register Fields
Bit No.
(Access)
7 PXPERR
(R/W)
6 ERRNCOR
(R/W)
5 FTERRUNDR
(R/W)
4 FTERROVR
(R/W)
18–74
register and cleared by write-1-to-clear.
14 13 12 11 10 9 8 7
0 0 0 0 0 0 0 0
30 29 28 27 26 25 24 23
0 0 0 0 0 0 0 0
Bit Name
PxP Ready Error Interrupt Mask.
ITU Preamble Error Not Corrected Interrupt Mask.
Frame Track Underflow Error Interrupt Mask.
Frame Track Overflow Error Interrupt Mask.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
6 5 4 3 2 1 0
0 0 0 0 0 0 0
CFIFOERR (R/W)
CFIFO Underflow or Overflow Error Interrupt
Mask
YFIFOERR (R/W)
YFIFO Underflow or Overflow Error Interrupt
Mask
LTERROVR (R/W)
Line Track Overflow Error Interrupt
Mask
LTERRUNDR (R/W)
Line Track Underflow Error Interrupt
Mask
22 21 20 19 18 17 16
0 0 0 0 0 0 0
Description/Enumeration
0 Unmask Interrupt
1 Mask Interrupt
0 Unmask Interrupt
1 Mask Interrupt
0 Unmask Interrupt
1 Mask Interrupt
0 Unmask Interrupt
1 Mask Interrupt