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Software Generated Interrupt Pending Set Register
The
GICDST_SGI_PND_SET
Figure 7-37: GICDST_SGI_PND_SET Register Diagram
Table 7-38: GICDST_SGI_PND_SET Register Fields
Bit No.
(Access)
15:0
VALUE
(R/NW)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register provides a set-pending bit for each interrupt supported by the GIC.
15
14
13
0
0
0
VALUE (R)
Software Generated Interrupt Set-Pending
Bit Name
Software Generated Interrupt Set-Pending.
Writing 1 to a Set-pending bit in the GICDST_SGI_PND_SET.VALUE bit field
sets the status of the corresponding peripheral interrupt to pending. Reading a bit
identifies whether the interrupt is pending.
12
11
10
9
8
7
6
5
0
0
0
0
0
0
0
0
Description/Enumeration
ADSP-SC58x GICDST Register Descriptions
4
3
2
1
0
0
0
0
0
0
7–69
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