Analog Devices ADSP-SC58 Series Hardware Reference Manual page 60

Queue Status Register .......................................................................................................................... 29–290
Interrupt Bridge Line and Pin Control Register .................................................................................. 29–291
Capability Pointer Register. ................................................................................................................. 29–294
Class Code and Revision ID Register ................................................................................................... 29–295
Root Complex Configuration Register ................................................................................................ 29–296
Root Control and Capabilities Register ............................................................................................... 29–297
Device Capabilities Register ................................................................................................................ 29–299
Root Complex Error Command Register ............................................................................................. 29–301
Root Error Status Register ................................................................................................................... 29–302
Device ID and Vendor ID Register ...................................................................................................... 29–305
Root Complex I/O Base and Limit Upper 16 bits Register .................................................................. 29–306
Memory Base and Memory Limit Register .......................................................................................... 29–307
Prefetchable Memory Base and Limit Register ..................................................................................... 29–308
Prefetchable Base Upper 32 Bits Register ............................................................................................. 29–309
Prefetchable Limit Upper 32 Bits Register ........................................................................................... 29–310
Root Complex Expansion ROM Base Address Register ....................................................................... 29–311
Secondary Status and I/O Base and Limit Register .............................................................................. 29–312
Command and Status Register ............................................................................................................. 29–315
Root Status Register ............................................................................................................................ 29–319
Latency Timer Register ........................................................................................................................ 29–320
Reset and Clock Control Register ........................................................................................................ 29–321
Reset and Clock Status ........................................................................................................................ 29–323
Symbol Timer Filter 1 Off ................................................................................................................... 29–325
Timer Control and Max Function Number Register ............................................................................ 29–326
Transmit Completion FC Credit Status Register ................................................................................. 29–327
Transmit Non-Posted FC Credit Status Register .................................................................................. 29–328
Transmit Posted FC Credit Status Register .......................................................................................... 29–329
Uncorrectable Error Mask Register ...................................................................................................... 29–330
Uncorrectable Error Severity Register .................................................................................................. 29–332
Uncorrectable Error Status Register ..................................................................................................... 29–334
lx ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference