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ADSP-SC58x GICDST Register Descriptions
Shared Peripheral Interrupt Register
The
GICDST_SPI[n]
Figure 7-64: GICDST_SPI[n] Register Diagram
Table 7-67: GICDST_SPI[n] Register Fields
Bit No.
(Access)
31:0
STAT
(R/NW)
7–98
register contains bits that provide the status of the SPI[987:0] inputs.
15
14
0
0
STAT[15:0] (R)
Shared Peripheral Interrupt Status
31
30
0
0
STAT[31:16] (R)
Shared Peripheral Interrupt Status
Bit Name
Shared Peripheral Interrupt Status.
The GICDST_SPI[n].STAT bit field returns the status of the SPI[987:0] inputs
on the distributor where bit [x] = 0 SPI[x] is low and bit [x] = 1 SPI[x] is high.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
13
12
11
10
9
8
7
6
0
0
0
0
0
0
0
0
29
28
27
26
25
24
23
22
0
0
0
0
0
0
0
0
Description/Enumeration
5
4
3
2
1
0
0
0
0
0
0
0
21
20
19
18
17
16
0
0
0
0
0
0
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