Analog Devices ADSP-SC58 Series Hardware Reference Manual page 236

Message Clear Bits Register
The register is used to clear bits in
RCU_MSG_CLR
CLR[31:16] (R0/W1C)
Clear MSG Register Bits
Figure 6-6: RCU_MSG_CLR Register Diagram
Table 6-11: RCU_MSG_CLR Register Fields
Bit No.
(Access)
31:0 CLR
(R0/W1C)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
15
0
CLR[15:0] (R0/W1C)
Clear MSG Register Bits
31
0
Bit Name
Clear MSG Register Bits.
The RCU_MSG_CLR.CLR bit resets MSG bit n.
register. Reading this register returns 0x00000000.
RCU_MSG
14 13 12 11 10 9 8 7
0 0 0 0 0 0 0 0
30 29 28 27 26 25 24 23
0 0 0 0 0 0 0 0
Description/Enumeration
ADSP-SC58x RCU Register Descriptions
6 5 4 3 2 1 0
0 0 0 0 0 0 0
22 21 20 19 18 17 16
0 0 0 0 0 0 0
6–19