Analog Devices ADSP-SC58 Series Hardware Reference Manual page 761

Table 16-25: SPI_IMSK_SET Register Fields (Continued)
Bit No.
(Access)
8 RS
(R/W1S)
7 MF
(R/W1S)
6 TC
(R/W1S)
5 TUR
(R/W1S)
4 ROR
(R/W1S)
2 TUWM
(R/W1S)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Set Receive Start.
The SPI_IMSK_SET.RS bit sets the corresponding mask bit in the
register.
Set Mode Fault.
The SPI_IMSK_SET.MF bit sets the corresponding mask bit in the
register.
Set Transmit Collision.
The SPI_IMSK_SET.TC bit sets the corresponding mask bit in the
register.
Set Transmit Underrun.
The SPI_IMSK_SET.TUR bit sets the corresponding mask bit in the
register.
Set Receive Overrun.
The SPI_IMSK_SET.ROR bit sets the corresponding mask bit in the
register.
Set Transmit Urgent Watermark.
The SPI_IMSK_SET.TUWM bit sets the corresponding mask bit in the
register.
ADSP-SC58x SPI Register Descriptions
Description/Enumeration
0 No effect
1 Set mask bit
0 No effect
1 Set mask bit
0 No effect
1 Set mask bit
0 No effect
1 Set mask bit
0 No effect
1 Set mask bit
0 No effect
1 Set mask bit
SPI_IMSK
SPI_IMSK
SPI_IMSK
SPI_IMSK
SPI_IMSK
SPI_IMSK
16–55