Analog Devices ADSP-SC58 Series Hardware Reference Manual page 454

Sharc+ processor
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ADSP-SC58x DMC Register Descriptions
Table 10-22: DMC_MR1 Register Fields (Continued)
Bit No.
(Access)
1
DIC0
(R/W)
0
DLLEN
(R/W)
10–48
Bit Name
Output Driver Impedance control.
The DMC_MR1.DIC0 bit is used with the DMC_MR1.DIC1 bit.
DLL Enable.
The DMC_MR1.DLLEN bit enables the DLL in the SDRAM. For more information
about this operation, see the data sheet for the SDRAM being used in your system.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description/Enumeration
0 Enable
1 Disable

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