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Table 8-4: ADSP-SC58x Trigger List Slaves (Continued)
Trigger ID
Name
102
MDMA0_SRC
103
MDMA0_DST
104
MDMA1_SRC
105
MDMA1_DST
106
MDMA2_SRC
107
MDMA2_DST
108
MDMA3_SRC
109
MDMA3_DST
110
CTI3_SLV0
111
CTI3_SLV1
112
CTI3_SLV2
113
CTI3_SLV3
114
CTI3_SLV4
115
CTI3_SLV5
116
CTI3_SLV6
117
CTI3_SLV7
118
C0_EVT
119
SWU0_EN
120
SWU2_EN
121
SWU1_EN
122
SWU4_EN
123
SWU3_EN
124
SWU6_EN
125
SWU5_EN
126
SWU7_EN
127
SWU8_EN
128
SWU9_EN
129
SWU10_EN
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description
Standard BW MDMA Channel 0 Source (CRC
IN)
Standard BW MDMA Channel 0 Destination
(CRC OUT)
Standard BW MDMA Channel 1 Source (CRC
IN)
Standard BW MDMA Channel 1 Destination
(CRC OUT)
Enh BW MDMA Source Channel
Enh BW MDMA Destination Channel
Max BW MDMA Source Channel
Max BW MDMA Destination Channel
CTI3 SYSCTI System Halt Master 0
CTI3 SYSCTI System Halt Master 1
CTI3 SYSCTI System Halt Master 2
CTI3 SYSCTI System Halt Master 3
CTI3 SYSCTI System Halt Master 4
CTI3 SYSCTI System Halt Master 5
CTI3 SYSCTI System Halt Master 6
CTI3 SYSCTI System Halt Master 7
C0 Event input for wake-up from WFE state
SWU0 Enable
SWU2 Enable
SWU1 Enable
SWU4 Enable
SWU3 Enable
SWU6 Enable
SWU5 Enable
SWU7 Enable
SWU8 Enable
SWU9 Enable
SWU10 Enable
TRU Functional Description
Sensitivity
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
8–11
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