Analog Devices ADSP-SC58 Series Hardware Reference Manual page 697

5. Clear the receive service request interrupt status by writing 1 to the LP_STAT.LRRQ bit.
6. Enable the link port by setting the LP_CTL.EN bit.
7. The data request interrupt is asserted whenever there is free space in the FIFO. The application can read from
the register based on the FIFO conditions (1 or 2 or 3 data available) which is reflected in the
LP_RX
LP_STAT.FFST bit field.
ADSP-SC58x LP Register Descriptions
Link Port (LP) contains the following registers.
Table 15-6: ADSP-SC58x LP Register List
Name
LP_CTL
LP_DIV
LP_RX
LP_STAT
LP_TX
LP_TXIN_SHDW
LP_TXOUT_SHDW
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description
Control Register
Clock Divider Value Register
Receive Buffer Register
Status Register
Transmit Buffer Register
Shadow Input Transmit Buffer Register
Shadow Output Transmit Buffer Register
ADSP-SC58x LP Register Descriptions
15–17