Table of Contents
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Configuring Boundary Compare and Boundary Zero Modes ................................................................ 23–8
Configuring GP Counter Push-Button Operation ................................................................................ 23–8
GP Counter Programming Concepts........................................................................................................ 23–8
CNT Input Noise Filtering .................................................................................................................. 23–8
Capturing Counter Interval and CNT_CNTR Read Timing ................................................................ 23–9
Capturing Time Interval Between Successive Counter Events ............................................................. 23–11
GP Counter Event Control ........................................................................................................................ 23–11
Illegal Gray and Binary Code Events ...................................................................................................... 23–12
Up/Down Count Events ......................................................................................................................... 23–12
Zero-Count Events ................................................................................................................................. 23–12
Overflow Events .................................................................................................................................... 23–12
Boundary Match Events ......................................................................................................................... 23–13
Zero Marker Events ................................................................................................................................ 23–13
ADSP-SC58x CNT Register Descriptions ................................................................................................ 23–13
Configuration Register .......................................................................................................................... 23–14
Command Register ................................................................................................................................ 23–17
Counter Register ................................................................................................................................... 23–20
Debounce Register ................................................................................................................................. 23–21
Interrupt Mask Register ......................................................................................................................... 23–23
Maximum Count Register ..................................................................................................................... 23–26
Minimum Count Register ..................................................................................................................... 23–27
Status Register ....................................................................................................................................... 23–28
ADC Control Module (ACM)
ACM Features.............................................................................................................................................. 24–2
ACM Functional Description....................................................................................................................... 24–3
ADSP-SC58x ACM Register List ............................................................................................................. 24–3
ADSP-SC58x ACM Interrupt List ........................................................................................................... 24–4
ADSP-SC58x ACM Trigger List............................................................................................................... 24–4
ACM Event Handling Latency.................................................................................................................. 24–5
ACM Timing Specifications ..................................................................................................................... 24–6
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ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
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