Analog Devices ADSP-SC58 Series Hardware Reference Manual page 297

ADSP-SC58x SEC Register Descriptions
Table 7-25: SEC_GSTAT Register Fields (Continued)
Bit No.
(Access)
5:4 ERRC
(R/NW)
1 ERR
(R/W1C)
7–52
Bit Name
Error Cause.
When the SEC updates the SEC_GSTAT.ERR bit, the SEC updates the
SEC_GSTAT.ERRC bits to indicate the error type.
Note that for SCI errors, the error status represents an OR of all the errors from each
SCI.
Note that for SSI errors, the error status indicates an error is active for any SSI input.
This error is an OR of all the interrupt source errors.
Error.
The SEC_GSTAT.ERR bit indicates an error has occurred in the SEC. When the
SEC asserts this bit (=1), the SEC updates the SEC_GSTAT.ERRC field to indicate
the corresponding error cause. Even if multiple errors occur, only the first error is cap-
tured on assertion of this bit. This status bit is sticky; write-1-to-clear it.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description/Enumeration
0 SFI Error
1 SCI Error
2 SSI Error
3 Reserved
0 No Error
1 Error Occurred