Analog Devices ADSP-SC58 Series Hardware Reference Manual page 636

ADSP-SC58x PORT Register Descriptions
Table 14-23: PORT_POL Register Fields (Continued)
Bit No.
(Access)
0 PX0
(R/W)
14–64
Bit Name
Port x Bit 0 Polarity Invert.
The PORT_POL.PX0 bit enables polarity inversion.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description/Enumeration
0 No Invert. GPIO is active high or rising edge sensitive.
1 Invert. GPIO is active low or falling edge sensitive.