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TRU Functional Description
Table 8-3: ADSP-SC58x Trigger List Masters (Continued)
Trigger ID
Name
30
SPORT3_A_DMA
31
SPORT3_B_DMA
32
SPORT4_A_DMA
33
SPORT4_B_DMA
34
SPORT5_A_DMA
35
SPORT5_B_DMA
36
SPORT6_A_DMA
37
SPORT6_B_DMA
38
SPORT7_A_DMA
39
SPORT7_B_DMA
40
SPI0_TXDMA
41
SPI0_RXDMA
42
SPI1_TXDMA
43
SPI1_RXDMA
44
SPI2_TXDMA
45
SPI2_RXDMA
46
HAE0_RXDMA_CH0
47
HAE0_RXDMA_CH1
48
HAE0_TXDMA
49
SINC0_P0_OVLD
50
SINC0_P1_OVLD
51
SINC0_P2_OVLD
52
SINC0_P3_OVLD
53
SINC0_DATA0
54
SINC0_DATA1
55
EMAC0_STAT
56
EMAC1_STAT
57
FFTA0_TXDMA
58
FFTA0_RXDMA
59
FFTA0_TRIGOUT
60
FIR0_DMA
8–4
Description
SPORT3 Channel A DMA
SPORT3 Channel B DMA
SPORT4 Channel A DMA
SPORT4 Channel B DMA
SPORT5 Channel A DMA
SPORT5 Channel B DMA
SPORT6 Channel A DMA
SPORT6 Channel B DMA
SPORT7 Channel A DMA
SPORT7 Channel B DMA
SPI0 TX DMA Channel
SPI0 RX DMA Channel
SPI1 TX DMA Channel
SPI1 RX DMA Channel
SPI2 TX DMA Channel
SPI2 RX DMA Channel
HAE0 RX DMA Channel 0
HAE0 RX DMA Channel 1
HAE0 TX DMA Channel 0
SINC0 Pair 0 Overload Indicator
SINC0 Pair 1 Overload Indicator
SINC0 Pair 2 Overload Indicator
SINC0 Pair 3 Overload Indicator
SINC0 Data Move 0
SINC0 Data Move 1
EMAC0 Status
EMAC1 Status
FFTA0 Transmit DMA
FFTA0 Receive DMA
FFTA0 Trigger Out
FIR0 DMA
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Sensitivity
Edge
Edge
Edge
Edge
Edge
Edge
Edge
Edge
Edge
Edge
Edge
Edge
Edge
Edge
Edge
Edge
Level
Level
Level
Edge
Edge
Edge
Edge
Edge
Edge
None
None
Edge
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