Analog Devices ADSP-SC58 Series Hardware Reference Manual page 552

Sharc+ processor
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ADSP-SC58x SMPU Register Descriptions
Bus Error Details Register
The
register indicates the ID of the bus error transaction, whether the transaction that caused the
SMPU_BDTLS
last bus error was a read, a write, secure or non-secure.
ID[7:0] (R)
ID of Transaction
RNW (R)
Read/Write Status
ID[12:8] (R)
ID of Transaction
Figure 13-3: SMPU_BDTLS Register Diagram
Table 13-7: SMPU_BDTLS Register Fields
Bit No.
(Access)
20:8
ID
(R/NW)
1
RNW
(R/NW)
0
SECURE
(R/NW)
13–16
15
14
13
12
11
10
9
0
0
0
0
0
0
0
31
30
29
28
27
26
25
0
0
0
0
0
0
0
Bit Name
ID of Transaction.
The SMPU_BDTLS.ID bit field provides the ID of the transaction that caused the
bad address error.
Read/Write Status.
The SMPU_BDTLS.RNW bit indicates whether the last transaction that caused the
bad address error was a read or write.
Secure Status Register.
The SMPU_BDTLS.SECURE bit indicates whether the last transaction that caused
the bad address error was secure or non-secure.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
24
23
22
21
20
19
18
17
0
0
0
0
0
0
0
0
Description/Enumeration
0 Transaction that caused last bus error was a write
1 Transaction that caused last bus error was a read
0 Transaction that caused last bus error was non-secure
1 Transaction that caused last bus error was secure
0
0
SECURE (R)
Secure Status Register
16
0

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