Analog Devices ADSP-SC58 Series Hardware Reference Manual page 24

Interrupt Masks...................................................................................................................................... 17–18
Interrupt Servicing ................................................................................................................................. 17–18
Transmit Interrupts ................................................................................................................................ 17–19
Receive Interrupts................................................................................................................................... 17–20
Status Interrupts..................................................................................................................................... 17–21
Multi-Drop Bus Events........................................................................................................................... 17–22
UART Programming Model ...................................................................................................................... 17–22
Detecting Autobaud ............................................................................................................................... 17–22
Using Common Initialization Steps........................................................................................................ 17–23
Using Core Transfers .............................................................................................................................. 17–23
Using DMA Transfers............................................................................................................................. 17–23
Using Interrupts ..................................................................................................................................... 17–23
Setting Up Hardware Flow Control ........................................................................................................ 17–23
ADSP-SC58x UART Register Descriptions .............................................................................................. 17–24
Clock Rate Register ............................................................................................................................... 17–25
Control Register .................................................................................................................................... 17–26
Interrupt Mask Register ......................................................................................................................... 17–32
Interrupt Mask Clear Register ............................................................................................................... 17–36
Interrupt Mask Set Register ................................................................................................................... 17–38
Receive Buffer Register .......................................................................................................................... 17–40
Receive Shift Register ............................................................................................................................ 17–41
Receive Counter Register ....................................................................................................................... 17–42
Scratch Register ..................................................................................................................................... 17–43
Status Register ....................................................................................................................................... 17–44
Transmit Address/Insert Pulse Register .................................................................................................. 17–49
Transmit Hold Register ......................................................................................................................... 17–50
Transmit Shift Register .......................................................................................................................... 17–51
Transmit Counter Register .................................................................................................................... 17–52
Enhanced Parallel Peripheral Interface (EPPI)
xxiv ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference