Analog Devices ADSP-SC58 Series Hardware Reference Manual page 855

Sharc+ processor
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ITU-R 656 Modes
Table 18-10: Operating Modes and Generic EPPI Operation
ITU-R BT.656 Rx
GP 0 FS
GP 1 FS
GP 2 FS
GP 3 FS
ITU-R 656 Input Modes
In the ITU-R 656 input modes, the video source provides the clock or the system supplies it externally.
As shown in the ITU-R 656 Input Submodes figure and described in the following sections, there are three submo-
des supported for ITU-R 656 inputs: entire field, active video only, and vertical blanking interval only.
18–16
How to configure
Entire field
DIR= 0
XFRTYPE = b#01
Active video
DIR = 0
XFRTYPE = b#00
Blanking only
DIR = 0
XFRTYPE = b#10
Tx
DIR = 1
XFRTYPE = b#11
FSCFG = b#00
Rx
DIR = 0
XFRTYPE = b#11
FSCFG = b#00
Tx
DIR = 1
XFRTYPE = b#11
FSCFG =b#01
Rx
DIR = 0
XFRTYPE = b#11
FSCFG = b#01
Tx
DIR = 1
XFRTYPE = b#11
FSCFG = b#10
Rx
DIR = 0
XFRTYPE = b#11
FS_CFG = b#10
Tx
DIR = 1
XFRTYPE = b#11
FSCFG = b#11
Rx
DIR = 0
XFRTYPE = b#11
FSCFG = b#11
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
How to configure in ITU
Useful for
R 656 Tx Mode
Applications where peri-
BLANKGEN = 1 DLEN
odic frame syncs are not
= (b#000, b#001 or
used to frame the data
b#100)
Interfacing with ADCs,
BLANKGEN = 1 DLEN
DACs, and other general-
= (b#000, b#001 or
purpose devices
b#100)
Video applications that
BLANKGEN = 1 DLEN
use two hardware syn-
= (b#000, b#001 or
chronization signals,
b#100)
HSYNC and VSYNC
Video applications that
BLANKGEN = 1 DLEN
use three hardware sync
= (b#000, b#001 or
signals, HSYNC,
b#100)
VSYNC, and FIELD

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