Analog Devices ADSP-SC58 Series Hardware Reference Manual page 84

Transmit Status B0 Register .................................................................................................................. 37–33
Transmit Status B1 Register .................................................................................................................. 37–34
Transmit Status B2 Register .................................................................................................................. 37–35
Transmit Status B3 Register .................................................................................................................. 37–36
Transmit Status B4 Register .................................................................................................................. 37–37
Transmit Status B5 Register .................................................................................................................. 37–38
Transmit User Buffer A0 Register .......................................................................................................... 37–39
Transmit User Buffer A1 Register .......................................................................................................... 37–40
Transmit User Buffer A2 Register .......................................................................................................... 37–41
Transmit User Buffer A3 Register .......................................................................................................... 37–42
Transmit User Buffer A4 Register .......................................................................................................... 37–43
Transmit User Buffer A5 Register .......................................................................................................... 37–44
Transmit User Buffer B0 Register .......................................................................................................... 37–45
Transmit User Buffer B1 Register .......................................................................................................... 37–46
Transmit User Buffer B2 Register .......................................................................................................... 37–47
Transmit User Buffer B3 Register .......................................................................................................... 37–48
Transmit User Buffer B4 Register .......................................................................................................... 37–49
Transmit User Buffer B5 Register .......................................................................................................... 37–50
User Bit Update Register ....................................................................................................................... 37–51
Direct Memory Access (DMA)
DMA Channel Features ............................................................................................................................... 38–1
DMA Channel Functional Description........................................................................................................ 38–3
ADSP-SC58x DMA Register List ............................................................................................................. 38–3
ADSP-SC58x DMA Channel List ............................................................................................................ 38–4
DMA Definitions ..................................................................................................................................... 38–5
Block Diagram.......................................................................................................................................... 38–7
Architectural Concepts ............................................................................................................................. 38–8
DMA Channel SCB Interface................................................................................................................ 38–9
SCB Interface Signals ........................................................................................................................ 38–9
SCB Burst Transfers .......................................................................................................................... 38–9
lxxxiv ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference