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ADSP-SC58x LP Register Descriptions
Status Register
The
register provides status information on link port interrupts, FIFO, buses, and receive/transmit re-
LP_STAT
quests.
LPBS (R)
Bus Status
LPACK (R)
Buffer Pack Status
FFST (R)
FIFO Status
Figure 15-16: LP_STAT Register Diagram
Table 15-10: LP_STAT Register Fields
Bit No.
(Access)
8
LPBS
(R/NW)
7
LPACK
(R/NW)
6:4
FFST
(R/NW)
15–22
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
0
31
30
29
28
27
26
25
24
0
0
0
0
0
0
0
0
Bit Name
Bus Status.
The LP_STAT.LPBS bit indicates the LPDAT bus status. LP_STAT.LPBS is kept
high if data is being driven by the link port into the LP_D[n] pins.
Buffer Pack Status.
The LP_STAT.LPACK bit indicates packing status.
In receive mode, 32-bit data is received in 4 blocks of 8-bit data. Then, the data is
packed to get a single 32-bit data before loading the FIFO. The LP_STAT.LPACK
bit is high during this packing process and goes low after packing.
In transmit mode, 32-bit data in the FIFO is unpacked to 4 blocks of 8-bit data before
sending. The LP_STAT.LPACK is high during unpacking.
FIFO Status.
The LP_STAT.FFST bits indicate the FIFO status. These bits are cleared when the
LP is disabled.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
23
22
21
20
19
18
17
16
0
0
0
0
0
0
0
0
Description/Enumeration
0 Bus is Idle Link Port Bus is idle
1 Bus Busy Link Port Bus is busy
0 Packing Complete Packing done
1 Packing Incomplete Packing is in progress
0 TX - Empty; RX - Empty Link buffer (TX OR RX)
empty
LTRQ (R/W1C)
Transmit Request
LRRQ (R/W1C)
Receive Request
ROVF (R/W1C)
Receive FIFO Overflow Interrupt
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