Analog Devices ADSP-SC58 Series Hardware Reference Manual page 896

Table 18-49: EPPI_CTL Register Fields (Continued)
Bit No.
(Access)
26 SPLTWRD
(R/W)
25 SUBSPLTODD
(R/W)
24 SPLTEO
(R/W)
23 SWAPEN
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Split Word.
The EPPI_CTL.SPLTWRD bit selects split word data placement when the data
length (EPPI_CTL.DLEN) selects 16-, 20-, or 24-bit data words. For all other
EPPI_CTL.SPLTWRD values, the set or clear selections for EPPI_CTL.SPLTWRD
produce the same result (act as though EPPI_CTL.SPLTWRD is cleared). For
EPPI_CTL.SPLTWRD set, the EPPI_CTL.DLEN values below result in the follow-
ing combinations of split words:
DLEN
16
20
24
Sub-Split Odd Samples.
The EPPI_CTL.SUBSPLTODD bit is valid only if EPPI_CTL.SPLTEO is set. If
EPPI_CTL.SUBSPLTODD is set, the EPPI sub-splits the odd sub-stream, and packs
them separately.
Split Even and Odd Data Samples.
If EPPI_CTL.SPLTEO is set, the EPPI splits the incoming data stream into two
sub-streams, an even stream and an odd stream, and packs them separately.
Swap Enable.
The EPPI_CTL.SWAPEN selects whether or not to swap the order of the first data
(most-significant bits versus least-significant bits) of the DMA word.
For receive modes, the EPPI puts the first data in the most significant bits (if set) or
puts the first data in the least significant bits (if cleared) of the DMA word.
For transmit modes, the EPPI transmits the most significant bits in the DMA word as
the first data (if set) or transmits the least significant bits in the DMA word as the first
data (if cleared).
Description/Enumeration
Cr/Cb data Y data
PPI_DATA[15:8] PPI_DATA[7:0]
PPI_DATA[19:10] PPI_DATA[9:0]
PPI_DATA[23:12] PPI_DATA[11:0]
0 PPI_DATA has (DLEN-1) bits of Y or Cr or Cb
1 PPI_DATA Contains 2 Elements per Word
0 Disable
1 Enable
0 Do Not Split Samples
1 Split Even/Odd Samples
0 Disable
1 Enable
ADSP-SC58x EPPI Register Descriptions
18–57