Analog Devices ADSP-SC58 Series Hardware Reference Manual page 918

Sharc+ processor
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Table 18-64: EPPI_STAT Register Fields (Continued)
Bit No.
(Access)
6
ERRNCOR
(R/W1C)
5
FTERRUNDR
(R/W1C)
4
FTERROVR
(R/W1C)
3
LTERRUNDR
(R/W1C)
2
LTERROVR
(R/W1C)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Preamble Error Not Corrected.
The EPPI_STAT.ERRNCOR bit is useful only in the ITU receive modes and indi-
cates if an error in the status word of EAV or SAV sequences can not be cleared (if set)
or not (if clear). This bit is sticky and must be cleared by software by writing 1 to it.
Frame Track Underflow.
The EPPI_STAT.FTERRUNDR bit indicates whether a frame track underflow error
has occurred (if set) or not (if clear). This bit is sticky and must be cleared by software
by writing 1 to it.
Frame Track Overflow.
The EPPI_STAT.FTERROVR bit indicates whether a frame track overflow error has
occurred (if set) or not (if clear). This bit is sticky and must be cleared by software by
writing 1 to it.
Line Track Underflow.
The EPPI_STAT.LTERRUNDR bit indicates whether a line track underflow error
has occurred (if set) or not (if clear). This bit is sticky and must be cleared by software
by writing 1 to it.
Line Track Overflow.
The EPPI_STAT.LTERROVR bit indicates whether a line track overflow error has
occurred (if set) or not (if clear). This bit is sticky and must be cleared by software by
writing 1 to it.
ADSP-SC58x EPPI Register Descriptions
Description/Enumeration
0 No uncorrected preamble error has occurred
1 Preamble error detected but not corrected
0 No Error Detected
1 Error Occurred
0 No Error Detected
1 Error Occurred
0 No Error Detected
1 Error Occurred
0 No Error Detected
1 Error Occurred
18–79

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