Analog Devices ADSP-SC58 Series Hardware Reference Manual page 644

Sharc+ processor
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ADSP-SC58x PINT Register Descriptions
PINT Assign Register
The
register controls the pin-to-interrupt request assignment in a byte-wide manner. This register
PINT_ASSIGN
consists of four control bytes that each function as a multiplexer control.
The PINT ports are subdivided into 8-bit half ports, resulting in lower and upper half 8-bit units. Using the multi-
plexers controlled by the
0 or byte 2 of either associated PINT block. The upper half units can be forwarded to either byte 1 or byte 3 of the
PINT block, without further restrictions.
B1MAP (R/W)
Byte 1 Mapping
B3MAP (R/W)
Byte 3 Mapping
Figure 14-25: PINT_ASSIGN Register Diagram
Table 14-27: PINT_ASSIGN Register Fields
Bit No.
(Access)
31:24
B3MAP
(R/W)
23:16
B2MAP
(R/W)
15:8
B1MAP
(R/W)
7:0
B0MAP
(R/W)
14–72
register, the lower half units of eight pins can be forwarded to either byte
PINT_ASSIGN
15
14
13
12
11
0
0
0
0
0
31
30
29
28
27
0
0
0
0
0
Bit Name
Byte 3 Mapping.
Byte 2 Mapping.
Byte 1 Mapping.
Byte 0 Mapping.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
10
9
8
7
6
5
4
3
0
0
1
0
0
0
0
0
26
25
24
23
22
21
20
19
0
0
0
0
0
0
0
0
Description/Enumeration
0 B3MAP_PAH. Byte 3 = PA.H
1 B3MAP_PBH. Byte 3 = PB.H
0 B2MAP_PAL. Byte 2 = PA.L
1 B2MAP_PBL. Byte 2 = PB.L
0 B1MAP_PAH. Byte 1 = PA.H
1 B1MAP_PBH. Byte 1 = PB.H
0 B0MAP_PAL. Byte 0 = PA.L
1 B0MAP_PBL. Byte 0 = PB.L
2
1
0
0
0
1
B0MAP (R/W)
Byte 0 Mapping
18
17
16
0
0
0
B2MAP (R/W)
Byte 2 Mapping

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