Analog Devices ADSP-SC58 Series Hardware Reference Manual page 549

Sharc+ processor
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*pREG_SMPU_RADDR0 = 0x20000000;
3. Program the
SMPU_RIDA[n]
rule.
*pREG_SMPU_RIDA0 = 0x0081; //corresponds to MDMA_WR
*pREG_SMPU_RIDB0 = 0x0081;
4. Program the
SMPU_RIDMSKA[n] andSMPU_RIDMSKB[n]
values programmed in the
*pREG_SMPU_RIDMSKA0 = 0xFFFF;
*pREG_SMPU_RIDMSKB0 = 0xFFFF;
5. Program the Region Control register
ID invert, write protection enable, read protection enable and memory region size can be configured in this
register.
*pREG_SMPU_RCTL0 = ENUM_SMPU_RCTL_WPROTEN|ENUM_SMPU_RCTL_RPROTDIS|
BITM_SMPU_RCTL_WIDCINV|BITM_SMPU_RCTL_RIDCINV| ((0<<BITP_SMPU_RCTL_SIZE) &
BITM_SMPU_RCTL_SIZE)
6. Set the SMPU_RCTL[n].EN bit.
*pREG_SMPU_RCTL0
Any accesses violation to the protection enabled by this procedure will be blocked. If the corresponding interrupt is
enabled, an interrupt is generated on protection violations.
ADSP-SC58x SMPU Register Descriptions
The System Memory Protection Unit (SMPU) contains the following registers.
Table 13-5: ADSP-SC58x SMPU Register List
Name
SMPU_BADDR
SMPU_BDTLS
SMPU_CTL
SMPU_EXACADD[n]
SMPU_EXACSTAT[n]
SMPU_IADDR
SMPU_IDTLS
SMPU_RADDR[n]
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
and
SMPU_RIDB[n]
SMPU_RIDA[n]
and
(SMPU_RCTL[n]
|= BITM_SMPU_RCTL_EN;
Description
Bus Error Address Register
Bus Error Details Register
SMPU Control Register
Exclusive Access IDn Address
Exclusive Access Status
Interrupt Address Register
Interrupt Details Register
Region n Address Register
registers with the ID which is to be an exception to the
registers with the mask to be applied to the ID
SMPU_RIDB[n]
registers respectively.
register) with the required fields. Control fields like
ADSP-SC58x SMPU Register Descriptions
13–13

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