Analog Devices ADSP-SC58 Series Hardware Reference Manual page 313

Sharc+ processor
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ADSP-SC58x GICDST Register Descriptions
Software Generated Interrupt Clear-Pending Register
The
GICDST_SGI_PND_CLR
Writing 1 to a clear-pending bit clears the pending status of the corresponding peripheral interrupt. Reading a bit
identifies whether the interrupt is pending.
Figure 7-36: GICDST_SGI_PND_CLR Register Diagram
Table 7-37: GICDST_SGI_PND_CLR Register Fields
Bit No.
(Access)
15:0
VALUE
(R/NW)
7–68
register provides a clear pending bit for each interrupt supported by the GIC.
15
14
13
0
0
0
VALUE (R)
Software Generated Interrupt Clear-Pending
Bit Name
Software Generated Interrupt Clear-Pending.
Writing 1 to a clear-pending bit in the GICDST_SGI_PND_CLR.VALUE bit field
clears the pending status of the corresponding peripheral interrupt. Reading a bit iden-
tifies whether the interrupt is pending.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
12
11
10
9
8
7
6
5
0
0
0
0
0
0
0
0
Description/Enumeration
4
3
2
1
0
0
0
0
0
0

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