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ADSP-SC58x SPI Register Descriptions
Slave Select Register
The
register enables the SPI_SEL[n] pins for output and indicates the state (high or low) of
SPI_SLVSEL
these pins when enabled.
SSEL7 (R/W)
Slave Select 7 Output
SSEL6 (R/W)
Slave Select 6 Output
SSEL5 (R/W)
Slave Select 5 Output
SSEL4 (R/W)
Slave Select 4 Output
SSEL3 (R/W)
Slave Select 3 Output
SSEL2 (R/W)
Slave Select 2 Output
SSEL1 (R/W)
Slave Select 1 Output
Figure 16-34: SPI_SLVSEL Register Diagram
Table 16-32: SPI_SLVSEL Register Fields
Bit No.
(Access)
15
SSEL7
(R/W)
14
SSEL6
(R/W)
16–68
15
14
13
12
11
10
1
1
1
1
1
1
31
30
29
28
27
26
0
0
0
0
0
0
Bit Name
Slave Select 7 Output.
The SPI_SLVSEL.SSEL7 bit state indicates the value driven on the related
SPI_SEL[n] pin.
Slave Select 6 Output.
The SPI_SLVSEL.SSEL6 bit state indicates the value driven on the related
SPI_SEL[n] pin.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
25
24
23
22
21
20
19
18
0
0
0
0
0
0
0
0
Description/Enumeration
0 Low
1 High
0 Low
1 High
1
0
0
0
SSE1 (R/W)
Slave Select 1 Enable
SSE2 (R/W)
Slave Select 2 Enable
SSE3 (R/W)
Slave Select 3 Enable
SSE4 (R/W)
Slave Select 4 Enable
SSE5 (R/W)
Slave Select 5 Enable
SSE6 (R/W)
Slave Select 6 Enable
SSE7 (R/W)
Slave Select 7 Enable
17
16
0
0
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