Analog Devices ADSP-SC58 Series Hardware Reference Manual page 752

ADSP-SC58x SPI Register Descriptions
Masked Interrupt Clear Register
The
SPI_ILAT_CLR
other bits in the register. Use write-1-to-clear on a bit in the
bit in the SPI_ILAT register.
TF (R/W1C)
Clear Transmit Finish
RF (R/W1C)
Clear Receive Finish
TS (R/W1C)
Clear Transmit Start
RS (R/W1C)
Clear Receive Start
MF (R/W1C)
Clear Mode Fault
Figure 16-24: SPI_ILAT_CLR Register Diagram
Table 16-22: SPI_ILAT_CLR Register Fields
Bit No.
(Access)
11 TF
(R/W1C)
10 RF
(R/W1C)
9 TS
(R/W1C)
16–46
register permits clearing individual mask bits in the
15 14 13 12 11 10 9 8
0 0 0 0 0 0 0 0
31 30 29 28 27 26 25 24
0 0 0 0 0 0 0 0
Bit Name
Clear Transmit Finish.
The SPI_ILAT_CLR.TF bit clears the corresponding mask bit in the
register.
Clear Receive Finish.
The SPI_ILAT_CLR.RF bit clears the corresponding mask bit in the
register.
Clear Transmit Start.
The SPI_ILAT_CLR.TS bit clears the corresponding mask bit in the
register.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
SPI_ILAT_CLR
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
23 22 21 20 19 18 17 16
0 0 0 0 0 0 0 0
Description/Enumeration
0 No effect
1 Clear mask bit
0 No effect
1 Clear mask bit
0 No effect
1 Clear mask bit
register without affecting
SPI_ILAT
register to clear the corresponding
RUWM (R)
Clear Receive Urgent Watermark
TUWM (R)
Clear Transmit Urgent Watermark
ROR (R/W1C)
Clear Receive Overrun
TUR (R/W1C)
Clear Transmit Underrun
TC (R/W1C)
Clear Transmit Collision
SPI_ILAT
SPI_ILAT
SPI_ILAT