Analog Devices ADSP-SC58 Series Hardware Reference Manual page 657

ADSP-SC58x PINT Register Descriptions
PINT Latch Register
The register indicates the interrupt latch status for pin interrupts. When set, an interrupt request is
PINT_LATCH
latched. When cleared, there is no interrupt request latched.
Both the and registers indicate whether an interrupt request is latched on the respective
PINT_REQ PINT_LATCH
pin. The PINT_LATCH register is a latch that operates regardless of the interrupt masks. Bits of the PINT_REQ
register depend on the mask register. The register is a logical AND of the register and
PINT_REQ PINT_LATCH
the interrupt mask.
Having two separate registers here enables the user to interrogate certain pins in polling mode while others work in
interrupt mode. The registers can be used for edge detection or pin activity detection.
PINT_LATCH
Both registers have W1C behavior. Writing a 1 to either register clears the respective bits in both registers. For inter-
rupt operation, the user may prefer to W1C the register (address still loaded in Px pointer). In polling
PINT_REQ
mode, it might be cleaner to W1C the PINT_LATCH register.
Whether in edge-sensitive mode or level-sensitive mode, PINT_LATCH bits are never cleared by hardware except at
system reset. Even in level-sensitive mode, the register functions as latch.
PINT_LATCH
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference 14–85