Analog Devices ADSP-SC58 Series Hardware Reference Manual page 604

ADSP-SC58x PORT Register Descriptions
Port x GPIO Direction Clear Register
The
PORT_DIR_CLR
formation, see the PORT_DIR
PX15 (R/W1C)
Port x Bit 15 Direction Clear
PX14 (R/W1C)
Port x Bit 14 Direction Clear
PX13 (R/W1C)
Port x Bit 13 Direction Clear
PX12 (R/W1C)
Port x Bit 12 Direction Clear
PX11 (R/W1C)
Port x Bit 11 Direction Clear
PX10 (R/W1C)
Port x Bit 10 Direction Clear
PX9 (R/W1C)
Port x Bit 9 Direction Clear
PX8 (R/W1C)
Port x Bit 8 Direction Clear
Figure 14-12: PORT_DIR_CLR Register Diagram
Table 14-13: PORT_DIR_CLR Register Fields
Bit No.
(Access)
15 PX15
(R/W1C)
14 PX14
(R/W1C)
14–32
register disables output mode and disables the output drivers for GPIO pins. For more in-
register description.
15 14 13 12 11
0 0 0 0 0
31 30 29 28 27
0 0 0 0 0
Bit Name
Port x Bit 15 Direction Clear.
The PORT_DIR_CLR.PX15 bit disables output mode and the output drivers for
port x.
Port x Bit 14 Direction Clear.
The PORT_DIR_CLR.PX14 bit disables output mode and the output drivers for
port x.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
10 9 8 7 6 5 4 3
0 0 0 0 0 0 0 0
26 25 24 23 22 21 20 19
0 0 0 0 0 0 0 0
Description/Enumeration
0 No Effect
1 Disable output mode/driver
0 No Effect
1 Disable output mode/driver
2 1 0
0 0 0
PX0 (R/W1C)
Port x Bit 0 Direction Clear
PX1 (R/W1C)
Port x Bit 1 Direction Clear
PX2 (R/W1C)
Port x Bit 2 Direction Clear
PX3 (R/W1C)
Port x Bit 3 Direction Clear
PX4 (R/W1C)
Port x Bit 4 Direction Clear
PX5 (R/W1C)
Port x Bit 5 Direction Clear
PX6 (R/W1C)
Port x Bit 6 Direction Clear
PX7 (R/W1C)
Port x Bit 7 Direction Clear
18 17 16
0 0 0