Analog Devices ADSP-SC58 Series Hardware Reference Manual page 253

SEC Functional Description
Table 7-3: ADSP-SC58x Combined SEC and GIC Interrupt List (Continued)
Module Event/Interrupt
UART UART1 Status
UART UART2 Transmit DMA
UART UART2 Receive DMA
UART UART2 Status
TWI TWI0 Data
TWI TWI1 Data
TWI TWI2 Data
CNT CNT0 Status
CTI CTI Event1, Core ID = 1
CTI CTI Event2, Core ID = 2
PKIC Public Key Interrupt (PKA, TRNG, SL)
PKTE Security Packet Engine
MSI MSI0 Status
USB USB0 Status/FIFO Data Ready
USB USB0 DMA Status/Transfer Complete
USB USB1 Status/FIFO Data Ready
USB USB1 DMA Status/Transfer Complete
TRU TRU0 Interrupt 4, core ID = 1
TRU TRU0 Interrupt 5, core ID = 1
TRU TRU0 Interrupt 6, core ID = 1
TRU TRU0 Interrupt 7, core ID = 1
TRU TRU0 Interrupt 8, core ID = 2
TRU TRU0 Interrupt 9, core ID = 2
TRU TRU0 Interrupt 10, core ID = 2
TRU TRU0 Interrupt 11, core ID = 2
SINC SINC0 Status
DAI DAI0 Low Priority
DAI DAI1 Low Priority
EMAC EMAC0 Status
EMAC EMAC1 Status
FFTA FFTA0 Transmit DMA
7–8
SEC ID GIC ID
119 151
120 152
121 153
122 154
123 155
124 156
125 157
126 158
127 Reserved
128 Reserved
129 161
130 162
131 163
132 164
133 165
134 166
135 167
136 Reserved
137 Reserved
138 Reserved
139 Reserved
140 Reserved
141 Reserved
142 Reserved
143 Reserved
144 176
145 177
146 178
148 180
149 181
150 182
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
SEC/GIC Interrupt Name
UART1_STAT
UART2_TXDMA
UART2_RXDMA
UART2_STAT
TWI0_DATA
TWI1_DATA
TWI2_DATA
CNT0_STAT
ECT_C1_EVT
ECT_C2_EVT
PKIC0_IRQ
PKTE0_IRQ
MSI0_STAT
USB0_STAT
USB0_DATA
USB1_STAT
USB1_DATA
TRU0_INT4
TRU0_INT5
TRU0_INT6
TRU0_INT7
TRU0_INT8
TRU0_INT9
TRU0_INT10
TRU0_INT11
SINC0_STAT
DAI0_IRQL
DAI1_IRQL
EMAC0_STAT
EMAC1_STAT
FFTA0_TXDMA