Analog Devices ADSP-SC58 Series Hardware Reference Manual page 727

SSEL
SCK
MOSI
(Q0)
MISO
(Q1)
M = 1, 2, 3, 4 ADDRESS BYTES
N = 4, 8, 16, 32 READ DATA BYTES
Z = 0, 4, 8, 12, ..., 28 BUS TURN AROUND CYCLES
* = 2 DATA BITS ARE SENT PER CLOCK PERIOD ON Q<1:0>
Figure 16-17: SPI Flash Fast Read (Dual I/O) Sequence
SSEL
SCK
MOSI
(Q0)
MISO
(Q1)
Q2
Q3
M = 1, 2, 3, 4 ADDRESS BYTES
N = 4, 8, 16, 32 READ DATA BYTES
Z = 0, 2, 4, 6, 8, 12, 14 BUS TURN AROUND CYCLES
* = 4 DATA BITS ARE SENT PER CLOCK PERIOD ON Q<3:0>
Figure 16-18: SPI Flash Quad Output Read Sequence
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
READ CMD ADDRESS
1 BYTE M BYTES
ADDRESS
M BYTES
READ CMD ADDRESS
1 BYTE M BYTES
ADDRESS
M BYTES
ADDRESS
M BYTES
ADDRESS
M BYTES
CONTINUOUS
CLOCKING
Z
HI-Z
MODE
BITS
HI-Z
MODE
BITS
CONTINUOUS
CLOCKING
Z
HI-Z
MODE
BITS
HI-Z
MODE
BITS
HI-Z
MODE
BITS
HI-Z
MODE
BITS
Memory-Mapped Mode (SPI2 only)
N x 4 CLOCKS
READ DATA
N BYTES (*)
READ DATA
N BYTES (*)
N x 2 CLOCKS
READ DATA
N BYTES (*)
READ DATA
N BYTES (*)
READ DATA
N BYTES (*)
READ DATA
N BYTES (*)
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