Analog Devices ADSP-SC58 Series Hardware Reference Manual page 226

Sharc+ processor
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Table 6-6: RCU_BCODE Register Fields (Continued)
Bit No.
(Access)
17
NOCORE1
(R/W)
16
NOCORE0
(R/W)
13
IDLEONENTRY
(R/W)
12
NOL2CONFIG
(R/W)
10
NOHOOK
(R/W)
9
NOPREBOOT
(R/W)
6
NOFAULTS
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
No Core 1 Present.
The RCU_BCODE.NOCORE1 bit indicates the presence of core 1.
No Core 0 Present.
The RCU_BCODE.NOCORE0 bit indicates the presence of core 0.
Idle On Entry.
The RCU_BCODE.IDLEONENTRY bit configures the RCU to enter the idle state at
startup.
No L2 Configuration.
The RCU_BCODE.NOL2CONFIG bit configures the RCU to not perform the L2
memory configuration.
No Hook.
The RCU_BCODE.NOHOOK bit configures the RCU to not perform the hook rou-
tine.
No Preboot.
The RCU_BCODE.NOPREBOOT bit configures the RCU to not perform the custom-
er preboot routine.
No Faults.
The RCU_BCODE.NOFAULTS bit configures the RCU to not perform fault initiali-
zation.
ADSP-SC58x RCU Register Descriptions
Description/Enumeration
0 Core does not exist
1 Core exists
0 Core does not exist
1 Core exists
0 Do not enter idle state
1 Enter idle state
0 Configure L2 memory
1 Do not configure L2 memory
0 Perform hook routine
1 Do not perform hook routine
0 Perform preboot
1 Do not perform preboot
0 Perform fault initialization
1 Do not perform fault initialization
6–9

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