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Peripherals Disable Register 0
The
DPM_PER_DIS0
save clock switching power.
VALUE[15:0] (R/W)
Peripheral Disable
LOCK (R/W)
Lock Bit
Figure 5-2: DPM_PER_DIS0 Register Diagram
Table 5-6: DPM_PER_DIS0 Register Fields
Bit No.
(Access)
31
LOCK
(R/W)
30:0
VALUE
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register is used to shut off the clocks to peripherals that are not used in an application to
15
14
13
12
11
0
0
0
0
0
31
30
29
28
27
0
0
0
0
0
Bit Name
Lock Bit.
Peripheral Disable.
The DPM_PER_DIS0.VALUE bits are used to shut of clocks in individual peripher-
als.
10
9
8
7
6
5
4
3
0
0
0
0
0
0
0
0
26
25
24
23
22
21
20
19
0
0
0
0
0
0
0
0
Description/Enumeration
0 FIR0
1 IIR0
2 FFT0
3 Reserved
4 RTC0
5 DAI0
6 DAI1
7 HAE0
8 SINC0
9 MLB0
10 EMAC0 (GigE)
11 EMAC1(10/100)
12 MSI0
13 EMDMA0/CH1
ADSP-SC58x DPM Register Descriptions
2
1
0
0
0
0
18
17
16
0
0
0
VALUE[30:16] (R/W)
Peripheral Disable
5–7
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