Table of Contents
Advertisement
ADSP-SC58x LP Register Descriptions
Transmit Buffer Register
The
register buffers the transmit data flow through the LP. The transmit buffer is two words deep. In the
LP_TX
transmit buffer, the input stage of the FIFO is used to accept core data or DMA data from internal memory, and the
data is transferred to the link port interface from the output stage of the FIFO. The output stage performs the un-
packing in the transmit buffer. The least significant byte is transmitted first. As each word is unpacked and transmit-
ted, the next location in FIFO becomes available and a new DMA request is made if DMA is enabled. If the register
becomes empty, the LP asserts the LP_CLK signal. For more information on LP buffer features and operations, see
the LP functional description.
Figure 15-17: LP_TX Register Diagram
Table 15-11: LP_TX Register Fields
Bit No.
(Access)
31:0
DATA
(R/W)
15–24
15
0
DATA[15:0] (R/W)
Transmit Data Buffer
31
0
DATA[31:16] (R/W)
Transmit Data Buffer
Bit Name
Transmit Data Buffer.
14
13
12
11
10
9
8
7
0
0
0
0
0
0
0
0
30
29
28
27
26
25
24
23
0
0
0
0
0
0
0
0
Description/Enumeration
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
6
5
4
3
2
1
0
0
0
0
0
0
0
0
22
21
20
19
18
17
16
0
0
0
0
0
0
0
Advertisement
Table of Contents
